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Autumn 2013:
Bring Up of First DEEP Hardware

Recently, a team of engineers from the DEEP partners Eurotech, University of Heidelberg, and Intel, together with the EXTOLL network developers succeeded in bringing up a first prototype of the DEEP Booster. Working at the Eurotech facilities in Amaro/Italy, the engineers set up the DEEP Booster prototype consisting of a Booster Node with an Intel® Xeon Phi(TM) attached, a backplane routing the EXTOLL network connections and providing power and cooling liquid, and an off-the-shelf Intel® Xeon® server with an EXTOLL Galibier card standing in for the Booster Interface Node. In this prototype setup, the EXTOLL NIC is implemented in an Altera Stratix V FPGA.

“We had to resolve some minor electrical issues with the hardware”, says Paul Arts, Technical Director HPC at Eurotech, “but finally, we were able to successfully bring up the prototype, with the EXTOLL link between the Booster Interface Node and the Booster Node established, a PCIe tunnel over EXTOLL set up, and the Xeon Phi receiving its firmware image via the PCIe tunnel.”

Michael Richter, Hardware Application Engineer at the Intel labs in Braunschweig/Germany adds: “This is probably the first time someone booted a Xeon Phi accelerator card without having it directly connected to a CPU. This is an important milestone for us because it proves that the DEEP concept really works.”

DEEP partners now put this prototype to good use via remote access to drive the development of the DEEP system software, including the Booster middleware, the Cluster/Booster communication protocol, and enhancements to the Intel® Xeon Phi(TM) operating system.

Autumn 2013: Bring Up of First DEEP HardwareAutumn 2013: Bring Up of First DEEP Hardware


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